1. Field of the Invention
The present invention relates to ceramic multilayer substrates and methods for manufacturing the same and particularly relates to a ceramic multilayer substrate having good surface planarity and excellent component mountability, and a method for manufacturing the same.
2. Description of the Related Art
In recent years, ceramic multilayer substrates having wiring conductors that are three-dimensionally arranged have been widely used for various applications.
The following substrate has been proposed as one of the ceramic multilayer substrates: a ceramic multilayer substrate having a configuration in which via-hole conductors and internal conductors are provided in a laminate including a plurality of stacked ceramic layers, in which external conductors are located on surfaces thereof, and in which the internal conductors are connected to the external conductors through the via-hole conductors (see, for example, WO 2005/067359).
In ceramic multilayer substrates having such a configuration as disclosed in WO 2005/067359, ceramic layers tend to be thin and internal circuit elements tend to be densely arranged because compact and high-performance electronic components are demanded.
However, a region where internal conductors are arranged so as to overlap each other in a stacking direction has a more convex substrate surface as compared to a region where no internal conductors are provided and therefore the planarity (coplanarity) of a ceramic multilayer substrate is impaired. This results in a problem that when electronic components (surface-mount components) are mounted on a surface of the ceramic multilayer substrate, the failure of component mounting occurs.